Modern wireless transmission systems require high linearity, high bandwidth, and high power efficiency to produce radio frequency (RF) signals. The requirements for high linearity and bandwidth are dictated by various wireless communication standards, such Long-Term Evolution (LTE), Wideband Code Division Multiple Access (WCDMA), and Global System for Mobile Communications (GSM). The bandwidth requirements stem from the higher data-rates expected from these systems. A high output frequency range is required to allow for multi-band operation. The power efficiency requirement comes from the demand for lower operating expenses, longer battery life, and simpler cooling systems.
Designing such wireless transmission systems while simultaneously optimizing all these requirements is a difficult task. Currently available building blocks used to design such systems have many limitations. Overcoming these limitations requires the use of sophisticated correction and compensation technics.
One such technic is the digital pre-distortion (DPD) system. An implementation of such a DPD system is depicted in FIG. 1. Many of these DPD systems digitally pre-distort a baseband signal S0 before it is converted in the analog domain and up-converted to RF domain (See FIG. 1).
With the advent of: 1) high speed digital to analog converters (DACs), providing sampling rates well above 10 Giga samples per second (GSPS) and the necessary resolution to generate analog signals in the frequency range from DC to several GHz; and, 2) deep sub-micron complementary metal-oxide semiconductor (CMOS) processes allowing for power efficient signals processing, wireless transmission systems can be built completely in the digital domain, i.e. the frequency up conversion using a digital up converter (DUC) and the digital pre-distortion (DPD) can be performed in the digital RF domain as shown in FIG. 2.
Pre-distorting the signals in the digital RF domain has many advantages over baseband pre-distortion systems. First, imperfections of the analog modulator, such as clock feed-through and image suppression, which need additional compensation efforts, do not exist. Second, the RF signals in the digital domain can be generated arbitrarily perfect, limited only by the quantization accuracy used to represent the involved signals. Third, the range, flexibility, and stability of operations and functions necessary to perform the pre-distortions is easier implemented in the digital domain compared to the analog domain. However, even in advanced low power deep sub-micron CMOS processes, operating digital systems at clock frequencies of several GHz demand efficient implementations of the DUC and DPD in order to stay within a given power budget.
Also, the implementation of the DPD must be flexible enough to compensate for all kinds of distortion effects a wireless transmission system might exhibit. Such distortion effects might include, nonlinear static transfer functions, nonlinear dynamic transfer functions, memory effects, and hysteresis effects.
Another requirement for wireless transmission systems is the synchronization of multiple individual wireless transmission systems. Active antenna arrays and beam-forming applications rely on synchronization. In embodiments of the subject invention, the term “synchronization” in this context means that the individual wireless transmission systems generate substantially the same output given the same input.
In order to achieve this, the digital subsystems (DUC and DPD engines) must be synchronized. In embodiments of the subject invention, an Engine comprises any electronic circuit that produces output signals based on a set of input signals and internal signals. The DUC includes an internal phase accumulator which gets incremented at every clock cycle. The phase accumulator is a system with an internal state. In embodiments of the subject invention, an internal state comprises the status of internal signals at any given time within a system that operates on input signals and internal signals to produce output signals. In order to achieve synchronizations, these internal states have to be synchronized. After the digital subsystems are synchronized, the remaining analog parts (DAC, power amplifier (PA), coupling element (CP)) have to be aligned. In general, only the output power and output phase of the individual subsystems are aligned.
In embodiments of the subject invention, the term “substantially” is defined as at least close to and can include a given value or state, as understood by a person of ordinary skill in the art. In one embodiment, the term “substantially” refers to ranges within 25%, preferably within 5%, more preferably within 1%, and most preferably within 0.1% of the given value or state being specified.